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EDGE692 200 MHz Monolithic Dual Pin Electronics Driver
EDGE HIGH-PERFORMANCE PRODUCTS Description
The EDGE692 is a dual pin electronics driver manufactured in a high-performance, complementary bipolar process. In Automatic Test Equipment (ATE) applications, the EDGE692 offers two pin drivers suitable for drive-only channels in memory testers, as well as for bidirectional channels in memory, VLSI, and mixed- signal test systems. The EDGE692 is designed to produce excellent waveforms (low overshoot), especially at low swings (<500 mV), and have extremely low leakage currents in HiZ mode. In addition, the EDGE692 is pin and functionally compatible with both the Edge693 and the Bt692. Each driver is capable of forcing 9V signals over a 12V range, in addition to going into a high impedance state. The driver slew rate is adjustable between 2 V/ns and 1 V/ns. Each driver is completely isolated from the other. There are separate data, enable, slew rate adjust, high and low levels, as well as power supply inputs for each driver. Combining two independent drivers into a 28 pin PLCC package offers a highly integrated solution where speed and density are at a premium.
DRVENA DRVENA* DRIVER A DHIA
Applications
* * Memory Test Equipment Instrumentation
Functional Block Diagram
SLEWADJA
Features
* * * * * * * * * * * 2 V/ns Driver Slew Rates Adjustable Driver Slew Rates Three Statable Low HiZ Leakage Low Voltage Driver Swings Low Overshoot Waveforms 12 V Output Range 9 V Output Swings 28-Pin PLCC with an Internal Heat Spreader Edge693 Compatible Bt692 Compatible
EN DHIA* DVHA DVLA BIAS DRVENB DRVENB* DRIVER B DHIB EN DHIB* DVHB DVLB
DOUTA
DOUTB
SLEWADJB
Revision 1 / March 31, 1998
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EDGE HIGH-PERFORMANCE PRODUCTS PIN Description
Pin Name Driver DRVENA, DRVENA* DRVENB, DRVENB* DHIA, DHIA* DHIB, DHIB* DOUTA DOUTB DVLA, DVHA DVLB, DVHB DVLCAPA, DVHCAPA DVLCAPB, DVHCAPB SLEWADJA SLEWADJB BIAS Power VEEA, VEEB VCCA, VCCB GNDA, GNDB Test Pins THERMAL DIODE
Pin #
Description
25, 24 5, 6 27, 28 3, 2 18 12 22, 23 8, 7 16, 21 14, 9 20 10 1
Wide voltage differential input pins that determine whether the driver (A and B respectively) is forcing a voltage or placed in a high impedance state. Wide voltage differential input pins that force one of two programmable levels (DVH or DVL) at the driver (A and B respectively) output. Driver A and driver B outputs. Buffereed analog inputs that program the low and high output levels for driver A and driver B. Analog pins. 0.01 F capacitor to ground should be connected to each pin. Analog current inputs that adjust the rise and fall slew rates of driver A and driver B. Analog input. A positive current into this node sets the internal bias level for driver A and driver B.
17, 13 19, 11 26, 4
Negative power supply for driver A and driver B. Positive power supply for driver A and driver B. Device ground for driver A and driver B.
15
Thermal monitor output used to track the die junction temperature.
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EDGE HIGH-PERFORMANCE PRODUCTS PIN Description (continued)
28-Pin PLCC
SLEWADJA 20
DVHCAPA
DRVENA*
DRVENA
25
24
23
22
21
GNDA DHIA DHIA* BIAS DHIB* DHIB GNDB
26 27 28 1 2 3 4
10 11 5 6 7 8 9
19
VCCA
DVHA
DVLA
18 17 16 15 14 13 12
DOUTA VEEA DVLCAPA THERMAL DIODE DVLCAPB VEEB DOUTB
DRVENB
DRVENB*
DVHCAPB
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SLEWADJB
VCCB
DVHB
DVLB
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EDGE HIGH-PERFORMANCE PRODUCTS Circuit Description
Introduction The driver circuit will force the DOUT output to one of three states: 1. 2. 3. DVH (driver high voltage level) DVL (driver low voltage level) High Impedance (Hi Z). Driver Levels DVH and DVL are high input impedance voltage controlled inputs that establish the driver logical high and low levels respectively. DVLCAP / DVHCAP These two analog nodes are brought out to better stabilize the high and low driver levels. Much like placing decoupling capacitors on the DVL and DVH input pins, the DVLCAP and DVHCAP pins require a fixed .01 F chip capacitor (with good high frequency characteristics) to ground. A tight layout with minimum etch is recommended. Driver Bias The drive enable (DRVEN/DRVEN*) inputs control whether the driver is forcing a voltage or is placed in a high-impedance state. If DRVEN is more positive than DRVEN*, the output will force either DVL or DVH, depending on the driver data inputs. When DRVEN is more negative than DRVEN*, the output is set to highimpedance, independent of the driver data inputs. Driver Data The BIAS input structure is shown in Figure 1. The driver data inputs (DHI/DHI*) determine whether the driver output is high or low. If DHI is more positive than DHI*, the output will force DVH when the driver is enabled. If DHI is more negative than DHI*, the output will force DVL when the driver is enabled. Table 1 summarizes the functionality of the driver enable and driver data pins.
DRVEN, DRVEN* DRVEN > DRVEN* DRVEN > DRVEN* DRVEN < DRVEN* DHI, DHI* DHI > DHI* DHI < DHI* X DOUT DVH DVL HiZ
VEE VCC
Both driver digital control inputs (DHI/DHI*, DRVEN/ DRVEN*) are wide-voltage differential inputs capable of receiving ECL, TTL, and CMOS signals. Single-ended operation is achievable by generating the proper threshold levels for the inverting inputs. Drive Enable
The BIAS pin is an analog current input that establishes a reference current for the driver and influences the overall speed and power consumption of the chip. The BIAS input current may be varied from 1.0 mA to 2.0 mA. Ideally, a current source would supply this current. However, a resistor to a voltage source, typically VCC, is acceptable.
REXT BIAS 50
Table 1. DRVEN and DHI Pin Functionality
Figure 1. BIAS Input Structure
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EDGE HIGH-PERFORMANCE PRODUCTS Circuit Description (continued)
The desired value for the external resistor can be determined from the relationship: IBIAS = (VCC - .7) / (Rext + 50). The actual IBIAS level is determined by selecting the desired performance and power level. The charts listed in the Application Information section enable the user to quickly determine the appropriate bias level. Thermal Monitor The EDGE692 includes an on-chip thermal monitor accessible through the THERMAL DIODE pin. This node connects to 5 diodes in series to VEE (see Figure 2) and may be used to accurately measure the junction temperature at any time.
Thermal Diode
Slew Rate Adjustment The driver rising and falling slew rates are adjustable from 2 V/ns to 1 V/ns. The actual slew rate realized is a function of the chip bias and slew rate adjust input currents. The SLEWADJ input is determined by selecting the desired performance and power level (after the BIAS current is first chosen.) The charts listed in the Application Information section enable the user to quickly determine the appropriate SLEWADJ level. SLEWADJ is a current controlled input that varies the rising and falling edge slew rates. Ideally, a current DAC would be used to establish this current. However, a resistor to a positive voltage, typically VCC, is acceptable. Figure 3 shows a simplified schematic of the SLEWADJ input stage. Once a desired input current is selected, the external resistor value is determined by the following relationship: (VCC - .7) / (Rext + 860) = Islewadj.
VCC
Bias Current
Temperature coefficient = -10 mV/ C
REXT SLEWADJ
VEE
1.72K
1.72K
Figure 2. Thermal Diode String A bias current of 100 A is injected into this node, and the measured voltage corresponds to a specific junction temperature with the following equation: TJ(C) = {[(VTHERMAL DIODE - VEE) / 5] - .7} / (-.00208). Notice that the driver A slew rate and driver B slew rate are independent. However, the rising and falling edge slew rates on each driver track each other and are not independent.
Iradj
Ifadj
Figure 3. SLEWADJ input circuitry
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EDGE HIGH-PERFORMANCE PRODUCTS Application Information
Family of Curves for Rise and Fall Times for 800 mV Swings.
Rise Times for 800 mV Swings
0.75
Rise Time (ns)
0.7 0.65 0.6 0.55 0.5 0.45 0.4 1 1.4 1.8 2.2
Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA Ibias = 1.75 mA Ibias = 2.0 mA
Slewadj (mA)
Fall Times for 800 mV Swings
0.85 0.8 Fall Time (ns) 0.75 0.7 0.65 0.6 0.55 0.5 0.45 1 1.4 1.8 2.2 Ibias = 1.75 mA Ibias = 2.0 mA Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS Application Information (continued)
Family of Curves for Rise and Fall Times for 3V Swings.
Rise Times for 3V Swings
3.5
Rise Time (ns)
3 2.5 2 1.5 1 1 1.4 1.8 2.2
Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA Ibias = 1.75 mA Ibias = 2.0 mA Slewadj (mA)
Fall Times for 3V Swings
3.5
Fall Time (ns)
3 2.5 2 1.5 1 1 1.4 1.8 2.2
Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA Ibias = 1.75 mA Ibias = 2.0 mA Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS Application Information (continued)
Family of Curves for Rise and Fall Times for 5V Swings.
Rise Times for 5V Swings
5.5 5 Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA Ibias = 1.75 mA 1 1.4 1.8 2.2 Ibias = 2.0 mA
Rise Time (ns)
4.5 4 3.5 3 2.5 2
Slewadj (mA)
Fall Times for 5V Swings
5.5 5
Fall Time (ns)
Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA
4.5 4 3.5 3 2.5 2 1 1.4 1.8 2.2
Ibias = 1.75 mA Ibias = 2.0 mA
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS Application Information (continued)
Supply Current Family of Curves
Negative Supply Current
160.00 140.00 Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA Ibias = 1.75 mA 1 1.4 1.8 2.2 Ibias = 2.0 mA
Iee (mA)
120.00 100.00 80.00 60.00
Slewadj (mA)
Positive Supply Current
160.00 140.00
Icc (mA)
Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA Ibias = 1.75 mA 1 1.4 1.8 2.2 Ibias = 2.0 mA
120.00 100.00 80.00 60.00
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS Application Information (continued)
Power Dissipation Family of Curves Conditions: VCC = +11.5V VEE = -7.5V Ta = 40C JA = 26C
Quiescent Power Consumption
3.00
Pd (Watts)
2.50 2.00
Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA
1.50 Ibias = 1.75 mA 1.00 1 1.4 1.8 2.2 Ibias = 2.0 mA
Slewadj (mA)
Junction Temperature
120.00 110.00 Ibias = 1.0 mA Ibias = 1.25 mA Ibias = 1.5 mA Ibias = 1.75 mA 1 1.4 1.8 2.2 Ibias = 2.0 mA
Tj (C)
100.00 90.00 80.00 70.00 60.00
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS Application Information (continued)
Thermal Information
Parameter Thermal Resistance Junction to Case Junction to Air Still Air 50 LFPM 400 LFPM Symbol JC JA JA JA Min Typ Max Units
oC/W
13
49 36 26
oC/W oC/W oC/W
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EDGE HIGH-PERFORMANCE PRODUCTS Package Information
28 Pin PLCC Package JA = 75 to 80C / W
PIN Descriptions
Pin #1 Pin #1 Ident 0.045 x 45o [1.143]
Pin #1
0.485 - 0.495 [12.32 - 12.57] SQ 0.450 - 0.456 [11.43 - 11.58] SQ
0.300 REF [7.62]
0.050 [1.27] TYP
.045 x 45 [1.14]
o
0.165 - 0.180 [4.19 - 4.57]
0.026 - 0.032 [0.661 - 0.812]
0.390 - 0430 [9.91 - 10.92]
0.026 - 0.032 [0.661 - 0.812]
0.090 - 0.120 [2.29 - 3.04]
Notes: (unless otherwise specified) 1. Dimensions are in inches [millimeters]. 2. Tolerances are: .XXX 0.005 [0.127]. 3. PLCC packages are intended for surface mounting on solder lands on 0.050 [1.27] centers.
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EDGE HIGH-PERFORMANCE PRODUCTS Recommended Operating Conditions
Parameter Positive Power Supply Negative Power Supply Total Analog Supply Analog Inputs Driver High Level Driver Low Level Driver Bias Driver A Slew Rate Adjust Driver B Slew Rate Adjust Ambient Operating Temperature Junction Temperature Symbol VCC VE E VCC - VEE DVH DVL BIAS SLEWADJA SLEWADJB TA TJ Min 8.5 -8.5 12.7 VEE + 3.5 VEE + 2.9 1.0 1.0 1.0 +25 +25 Typ 11.5 -7.5 Max 13.5 -4.2 19.0 VCC - 2.9 VCC - 3.5 2.0 2.2 2.2 +70 +125 Units V V V V V mA mA mA
oC oC
1.5 1.75 1.75
Absolute Maximum Ratings
Parameter VCC (Relative to GND) VEE (Relative to GND Total Power Supply Digital Input Voltages Differential Input Voltages Analog Voltages Analog Input Currents Driver Bias Slew Rate Adjust Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature (5 seconds, 1/4" from pin) Symbol VCC VEE VCC - VEE DRVEN, DRVEN* DHI, DHI* DRVEN - DRVEN* DHI - DHI* DOUT, DVL, DVH BIAS SLEWADJA SLEWADJB TA TS TJ TSOL VEE -5.0 VEE 0 0 0 -55 -65 Min 0 -10.0 Typ Max +14.0 0 +20.0 +6.0 +5.0 VCC 2.6 2.8 2.8 +125 +150 +150 260 Units V V V V V V mA mA mA
oC oC oC oC
Thermal equilibrium is established by applying power for at least 2 minutes while maintaining a transverse air flow of 400 linear feet per minute over the device mounted either in the test socket or on the printed circuit board. Thermal resistance measurements are taken with device soldered to PCB.
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EDGE HIGH-PERFORMANCE PRODUCTS DC Characteristics
Parameter Driver Circuit Analog Input Current DVH, DVL Bias Input Adjustment Inputs SLEWADJ Current Range Driver Circuit Output Voltage Range Output Voltage Swing Max Static Output Current: DOUT > -2V DOUT < -2V Max Dynamic Output Current DOUT Leakage Current (Note 1) DC Accuracy Driver High Offset (Note 2) Gain (Note 3) Linearity (Note 4) Driver Low Offset (Note 2) Gain (Note 3) Linearity (Note 4) Offset Voltage Temperature Coefficient Driver Output Impedance Driver PSRR Digital Inputs DRVEN, DRVEN*, DHI, DHI* Input Current Input Voltage Range Differential Input Swing Power Supply Current Positive Supply Negative Supply VDOUT Vswing IDOUT IDOUT ILEAK IIN BIAS -200 1.0 1.0 VEE + 3.5 0 -35 -20 -100 -1 +200 2.0 2.2 VCC - 3.5 9.0 +35 +20 +100 1 A mA mA V V mA mA mA A Symbol Min Typ Max Units
1.5 1.75
<.025
DVH - DOUT DVH / DOUT DVL - DOUT DVH - DOUT DVH / DOUT DVL - DOUT DOUT TC ZOUT PSRR
-150 .95 -20 -150 .95 -20
.99 <10
350 1.0 20 350 1.0 20
mV V/V mV mV V/V mV mV/oC
.99 <10 1
1.0 30
3.0
4.5
dB
IIN VRNG VDIFF ICC IEE
-900 -2.0 0.25 120 120
+900 +5.5 +4.0 150
A V V mA mA
-150
Note 1: Note 2: Note 3:
Note 4:
Device output leakage is specified with DOUT over the entire output voltage range. The offset voltage is defined as the difference between the measured driver output at DOUT under no load conditions versus the programmed voltage (DVH or DVL) when forced to -1.0 V. The driver gain is defined as the change in driver output voltage (DOUT) divided by the change in programmed input voltage (DVH or DVL). Measurements are taken at -1.0 V and +4.0 V programmed inputs with the output under no-load conditions. Linearity error is defined as the maximum deviation between the theoretical driver output voltage (predicted by the straight line determined by the offset and gain) and the actual measured output voltage under no load conditions.
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EDGE HIGH-PERFORMANCE PRODUCTS AC Characteristics
Parameter Driver Circuit Tpd from DHI to DOUT (Note 1) Tpd from DRVEN to DOUT HiZ (Note 2) Tpd from DRVEN to DOUT Active (Note 2) DOUT Rise/Fall Times (Note 3) 800 mV, 20% - 80% 3V, 10% - 90% 5V, 10% - 90% Toggle Rate 800 mV 3V 5V Output Capacitance in HiZ Minimum Pulse Width (Note 4) 800 mV 3V 5V Tr/Tf Tr/Tf Tr/Tf Fmax 200 150 100 Cout 2.5 3.0 5.0 2.0 MHz MHz MHz
pF
Symbol
Min
Typ
Max
Units
Tpd
1.7 1.7 1.7 .5 1.25 2.25 0.6 1.6 2.75 .75 3.0 5.0
ns ns ns ns ns ns
ns ns ns
The specified limits shown can be met only after thermal equilibrium has been established. Thermal equilibrium is established by applying power for at least two minutes while maintaining the normal operating environment. Note 1: Note 2: Tpd is measured from crossover point of DHI and DHI* to the 50% point in the output. DVL equals 0 V and DVH equals +3 V. Specification condition: DVL equals -1 V and DVH equals +1 V. Output is terminated to GND by 100 . Tpd is measured from the crossover point of DRVEN and DRVEN* to the point where a 10-percent change in output voltage occurs. The driver load is an 18" 50. transmission line terminated with 1K. in parallel with 2 pF. The output pulse width is measured at the 50-percent points. Output reaches 100% of programmed value.
Note 3: Note 4:
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EDGE HIGH-PERFORMANCE PRODUCTS Ordering Information
Model Number E692AHJ
Package 28-Pin PLCC (with Internal Heat Spreader)
Ambient Temperature Range +25oC to +70oC
EVM692AHJ
EDGE692 Evaluation Module
Contact Information
Semtech Corporation Edge High-Performance Division 10021 Willow Creek Rd., San Diego, CA 92131 Phone: (858)695-1808 FAX (858)695-2633
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